Biblio

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Filters: Author is David Kohlbrenner  [Clear All Filters]
2023
Yu J, Dutta A, Jaeger T, Kohlbrenner D, Fletcher CW.  2023.  Synchronization Storage Channels (S2C)}}}}: Timer-less Cache Side-Channel Attacks on the Apple M1 via Hardware Synchronization Instructions. 32nd USENIX Security Symposium (USENIX Security 23). :1973--1990.
2022
Wang Y, Paccagnella R, He ETang, Shacham H, Fletcher CW, Kohlbrenner D.  2022.  Hertzbleed: Turning Power Side-Channel Attacks Into Remote Timing Attacks on x86. 31st USENIX Security Symposium (USENIX Security 22). :679--697.
2017
Kohlbrenner D, Shacham H.  2017.  On the effectiveness of mitigations against floating-point timing channels. 26th USENIX Security Symposium (USENIX Security 17). :69--81.
Disselkoen C, Kohlbrenner D, Porter L, Tullsen D.  2017.  Prime+Abort: A Timer-Free High-Precision L3 Cache Attack using Intel TSX. 26th USENIX Security Symposium (USENIX Security 17). :51--67.
2016
Kohlbrenner D, Shacham H.  2016.  Trusted Browsers for Uncertain Times. 25th USENIX Security Symposium (USENIX Security 16). :463--480.