GraCE: Unlocking CUDA Graphs with Compiler Support for ML Workloads

Abhishek Ghosh and Ajay Nayak, Indian Institute of Science; Ashish Panwar, Microsoft Research; Arkaprava Basu, Indian Institute of Science

Machine learning (ML) workloads launch hundreds of short-running GPU kernels per iteration. With GPU compute throughput growing rapidly, CPU-side launch latency of kernels is emerging as a bottleneck. CUDA Graphs promise to address this by replaying a set of kernels with a single dispatch of the graph, removing per-kernel launch costs. However, CUDA Graphs remain surprisingly difficult to deploy correctly and efficiently.

We present GraCE—a compiler framework to maximize the coverage and benefits of CUDA Graphs for ML workloads. It introduces three novel optimizations: it applies automatic code transformations to make ML applications amenable for CUDA Graphs; it eliminates the parameter copy overheads for kernels executing in CUDA Graphs, and it selectively deploys CUDA Graphs guided by a cost–benefit analysis. For 25 ML workloads from TorchBench, HuggingFace and TIMM, GraCE more than doubles the benefit from deploying CUDA Graph compared to the most popular and widely used ML compiler PyTorch2. GraCE is built atop PyTorch2’s compilation framework and requires no programmer intervention.

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BibTeX
@inproceedings {318587,
author = {Abhishek Ghosh and Ajay Nayak and Ashish Panwar and Arkaprava Basu},
title = {{GraCE}: Unlocking {CUDA} Graphs with Compiler Support for {ML} Workloads},
booktitle = {20th USENIX Symposium on Operating Systems Design and Implementation (OSDI 26)},
year = {2026},
isbn = {978-1-939133-55-7},
address = {Seattle, WA},
pages = {1927--1947},
url = {https://www.usenix.org/conference/osdi26/presentation/ghosh},
publisher = {USENIX Association},
month = jul
}