Skip to main content
USENIX
  • Conferences
  • Students
Sign in
  • FAST '14 Home
  • Conference Organizers
  • Registration Information
    • Registration Discounts
    • Venue, Hotel, and Travel
  • At a Glance
  • Calendar
  • Training Program
  • Technical Sessions
    • WiPs
  • Activities
    • Poster Sessions
    • Birds-of-a-Feather Sessions
  • Sponsorship
  • Students and Grants
  • Services
  • Questions?
  • Help Promote!
  • For Participants
  • Call for Papers
  • Past Conferences

sponsors

Platinum Sponsor
Gold Sponsor
Gold Sponsor
Gold Sponsor
Gold Sponsor
Gold Sponsor
Silver Sponsor
Bronze Sponsor
Bronze Sponsor
Bronze Sponsor
Bronze Sponsor
Bronze Sponsor
General Sponsor
General Sponsor
General Sponsor
General Sponsor
General Sponsor
General Sponsor
General Sponsor
Media Sponsor
Media Sponsor
Media Sponsor
Media Sponsor
Media Sponsor
Media Sponsor
Media Sponsor
Media Sponsor
Media Sponsor
Media Sponsor
Media Sponsor
Industry Partner
Industry Partner

twitter

Tweets by @usenix

usenix conference policies

  • Event Code of Conduct
  • Conference Network Policy
  • Statement on Environmental Responsibility Policy

You are here

Home » DC Express: Shortest Latency Protocol for Reading Phase Change Memory over PCI Express
Tweet

connect with us

http://twitter.com/usenix
https://www.facebook.com/pages/USENIX-Association/124487434386
http://www.linkedin.com/groups/USENIX-Association-49559/about
https://plus.google.com/108588319090208187909/posts
http://www.youtube.com/user/USENIXAssociation

DC Express: Shortest Latency Protocol for Reading Phase Change Memory over PCI Express

Authors: 

Dejan Vučinić, Qingbo Wang, Cyril Guyot, Robert Mateescu, Filip Blagojević, Luiz Franca-Neto, and Damien Le Moal, HGST San Jose Research Center; Trevor Bunker, Jian Xu, and Steven Swanson, University of California, San Diego; Zvonimir Bandić, HGST San Jose Research Center

Abstract: 

Phase Change Memory (PCM) presents an architectural challenge: writing to it is slow enough to make attaching it to a CPU’s main memory controller impractical, yet reading from it is so fast that using it in a peripheral storage device would leave much of its performance potential untapped at low command queue depths, throttled by the high latencies of the common peripheral buses and existing device protocols.

Here we explore the limits of communication latency with a PCM-based storage device over PCI Express. We devised a communication protocol, dubbed DC Express, where the device continuously polls read command queues in host memory without waiting for host-driven initiation, and completion signals are eliminated in favor of a novel completion detection procedure that marks receive buffers in host memory with incomplete tags and monitors their disappearance. By eliminating superfluous PCI Express packets and context switches in this manner we are able to exceed 700,000 IOPS on small random reads at queue depth 1.

Dejan Vučinić, HGST San Jose Research Center

Qingbo Wang, HGST San Jose Research Center

Cyril Guyot, HGST San Jose Research Center

Robert Mateescu, HGST San Jose Research Center

Filip Blagojević, HGST San Jose Research Center

Luiz Franca-Neto, HGST San Jose Research Center

Damien Le Moal, HGST San Jose Research Center

Trevor Bunker, University of California, San Diego

Jian Xu, University of California, San Diego

Steven Swanson, University of California, San Diego

Zvonimir Bandić, HGST San Jose Research Center

Open Access Media

USENIX is committed to Open Access to the research presented at our events. Papers and proceedings are freely available to everyone once the event begins. Any video, audio, and/or slides that are posted after the event are also free and open to everyone. Support USENIX and our commitment to Open Access.

BibTeX
@inproceedings {179877,
author = {Dejan Vu{\v c}ini{\'c} and Qingbo Wang and Cyril Guyot and Robert Mateescu and Filip Blagojevi{\'c} and Luiz Franca-Neto and Damien Le Moal and Trevor Bunker and Jian Xu and Steven Swanson and Zvonimir Bandi{\'c}},
title = {{DC} Express: Shortest Latency Protocol for Reading Phase Change Memory over {PCI} Express},
booktitle = {12th USENIX Conference on File and Storage Technologies (FAST 14)},
year = {2014},
isbn = {ISBN 978-1-931971-08-9},
address = {Santa Clara, CA},
pages = {309--315},
url = {https://www.usenix.org/conference/fast14/technical-sessions/presentation/vucinic},
publisher = {USENIX Association},
month = feb,
}
Download
Vučinić PDF

Presentation Video 

Presentation Audio

MP3 Download

Download Audio

  • Log in or    Register to post comments

Open access to the FAST '14 Proceedings is sponsored by USENIX and Symantec.

Platinum Sponsors

Gold Sponsors

Silver Sponsors

Bronze Sponsors

General Sponsors

Media Sponsors & Industry Partners

© USENIX

  • Privacy Policy
  • Contact Us