Accelerating SDN/NFV with Transparent Offloading Architecture

Software Defined Networking (SDN) is attracting much attention in the information and communications tech-nology (ICT) industries. In particular, the telecom industry calls for Network Functions Virtualisation (NFV). NFV aims to reduce operator CAPEX and OPEX through reduced equipment costs and reduced power consumption. Equipment costs are not reduced by proprietary hardware appliances, but by implementing software on industry-standard servers. On the other hand, the reduction of power consumption for future networks is recommended by ITU-T Y.3021, which defines three levels of energy-saving technologies: the network level, equipment level, device level. Because of the software-centric implementation of the virtual network functions, there is still a lot of room for improvement in their performance. In this paper, the challenge is how to enhance the performance of virtual network functions in terms of device-level technology without increasing CAPEX and OPEX.

Specifically, we focus on two objectives. (1) Reduce programming effort by integrating accelerators into the in-dustry standard server CPU in a novel way, because COTS (commercial-off-the-shelf) accelerators, such as FPGAs, NPUs, or GPUs, have their own programming system that is different from standard one. (2) Devise an alternative accelerator that enables high-performance, energy-efficient operations for full-time flow forwarding servers. Alt-hough state-of-the-art servers are energy-efficient, their energy efficiency will become worse when several COTS accelerators are mounted on them.