Bolt: Faster Reconfiguration in Operating Systems
Sankaralingam Panneerselvam, Michael M. Swift, and Nam Sung Kim, University of Wisconsin—Madison
Dynamic resource scaling enables provisioning extra resources during peak loads and saving energy by reclaiming those resources during off-peak times. Scaling the number of CPU cores is particularly valuable as it allows power savings during low-usage periods. Current systems perform scaling with a slow hotplug mechanism, which was primarily designed to remove or replace faulty cores. The high cost of scaling is reflected in power management policies that perform scaling at coarser time scales to amortize the high reconfiguration latency.
We describe Bolt, a new mechanism built on existing hotplug infrastructure to reduce scaling latency. Bolt also supports a new bulk interface to add or remove multiple cores at once. We implemented Bolt for x86 and ARM architectures. Our evaluation shows that Bolt can achieve over 20x speedup for entering offline state. While turning on CPUs, Bolt achieves speedup up to 10x and 21x for x86 and ARM respectively.
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author = {Sankaralingam Panneerselvam and Michael Swift and Nam Sung Kim},
title = {Bolt: Faster Reconfiguration in Operating Systems},
booktitle = {2015 USENIX Annual Technical Conference (USENIX ATC 15)},
year = {2015},
isbn = {978-1-931971-225},
address = {Santa Clara, CA},
pages = {511--516},
url = {https://www.usenix.org/conference/atc15/technical-session/presentation/panneerselvam},
publisher = {USENIX Association},
month = jul
}
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