Designing a Storage Software Stack for Accelerators

Authors: 

Shinichi Awamoto, NEC Labs Europe; Erich Focht, NEC Deutschland; Michio Honda, University of Edinburgh

Abstract: 

Although modern accelerator devices, such as vector engines and SmartNICs, are equipped with general purpose CPUs, access to the storage needs the mediation of the host kernel and CPUs, resulting in latency and throughput penalties. In this paper, we explore the case for direct storage access inside the accelerator applications, and discuss the problem, design options and benefits of this architecture. We demonstrate that our architecture can improve throughputs of LevelDB by 12–89%, and reduce the execution time by 33–46 % in a bioinformatics application in comparison to the baseline where the host system mediates the storage accesses.

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BibTeX
@inproceedings {254298,
author = {Shinichi Awamoto and Erich Focht and Michio Honda},
title = {Designing a Storage Software Stack for Accelerators},
booktitle = {12th {USENIX} Workshop on Hot Topics in Storage and File Systems (HotStorage 20)},
year = {2020},
url = {https://www.usenix.org/conference/hotstorage20/presentation/awamoto},
publisher = {{USENIX} Association},
month = jul,
}

Presentation Video