ArchTM: Architecture-Aware, High Performance Transaction for Persistent Memory


Kai Wu and Jie Ren, University of California, Merced; Ivy Peng, Lawrence Livermore National Laboratory; Dong Li, University of California, Merced


Failure-atomic transactions are a critical mechanism for accessing and manipulating data on persistent memory (PM) with crash consistency. We identify that small random writes in metadata modifications and locality-oblivious memory allocation in traditional PM transaction systems mismatch PM architecture. We present ArchTM, a PM transaction system based on two design principles: avoiding small writes and encouraging sequential writes. ArchTM is a variant of copy-on-write (CoW) system to reduce write traffic to PM. Unlike conventional CoW schemes, ArchTM reduces metadata modifications through a scalable lookup table on DRAM. ArchTM introduces an annotation mechanism to ensure crash consistency and a locality-aware data path in memory allocation to increases coalesable writes inside PM devices. We evaluate ArchTM against four state-of-the-art transaction systems (one in PMDK, Romulus, DudeTM, and one from Oracle. ArchTM outperforms the competitor systems by 58x, 5x, 3x and 7x on average, using micro-benchmarks and real-world workloads on real PM.

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@inproceedings {264810,
author = {Kai Wu and Jie Ren and Ivy Peng and Dong Li},
title = {{ArchTM}: {Architecture-Aware}, High Performance Transaction for Persistent Memory},
booktitle = {19th USENIX Conference on File and Storage Technologies (FAST 21)},
year = {2021},
isbn = {978-1-939133-20-5},
pages = {141--153},
url = {},
publisher = {USENIX Association},
month = feb

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