A Comprehensive Analysis of Superpage Management Mechanisms and Policies


Weixi Zhu, Alan L. Cox, and Scott Rixner, Rice University


Superpages (2MB pages) can reduce the address translation overhead for large-memory workloads in modern computer systems. This paper clearly outlines the sequence of events in the life of a superpage and explores the design space of when and how to trigger and respond to those events. This provides a framework that enables better understanding of superpage management and the trade-offs involved in different design decisions. Under this framework, this paper discusses why state-of-the-art designs exhibit different performance characteristics in terms of runtime, latency and memory consumption. This paper illuminates the root causes of latency spikes and memory bloat and introduces Quicksilver, a novel superpage management design that addresses these issues while maintaining address translation performance.

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@inproceedings {254481,
author = {Weixi Zhu and Alan L. Cox and Scott Rixner},
title = {A Comprehensive Analysis of Superpage Management Mechanisms and Policies},
booktitle = {2020 {USENIX} Annual Technical Conference ({USENIX} {ATC} 20)},
year = {2020},
isbn = {978-1-939133-14-4},
pages = {829--842},
url = {https://www.usenix.org/conference/atc20/presentation/zhu-weixi},
publisher = {{USENIX} Association},
month = jul,

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