Throughput vs. Response Time

Figure 6: A comparison of LRU Top, LRU Bottom, and SARC. The top (resp. bottom) three panels correspond to SPC-1 Like in cache-sensitive (resp. cache-insensitive) configuration. For both the configurations, the left column displays throughput versus overall average response times, the middle column displays throughput versus power, and the right column displays the evolution of the rate of tracks staged to cache. The vertical lines demarcate the load schedules in Table I.

The two plots in the left column of Figure 6 show the throughput (in scaled IOPS) versus average response time (in ms) for all three algorithms by using the SPC-1 Like workload. Each displayed data point is an average of $27$ numbers, each number being an overall response time average for read and write requests over a minute. According to SPC-1 specification, the numbers corresponding to the first three minutes of a measurement phase are discarded.

The top, left plot is obtained on a cache-sensitive configuration (see Section IV-D) for which, due to relatively high cache hit ratio, a High Load schedule (see Table I) is required to saturate the machine. The bottom, left plot is observed on a cache-insensitive configuration for which, due to relatively low cache hit ratio, a Low Load schedule is sufficient. LRU Bottom generally allocates more cache space to RANDOM than to SEQ when compared to LRU Top. Hence, LRU Bottom performs better than LRU Top in the cache-sensitive configuration where RANDOM list has more utility, whereas, the reverse is true in the cache-insensitive configuration. However, in both the cases, SARC significantly and dramatically outperforms both the LRU variants by judiciously and dynamically partitioning the cache space amongst the two lists. Due to its self-tuning nature, SARC achieves this without any a priori knowledge of the different workloads resulting from different configurations and load levels. For the cache-sensitive configuration (resp. cache-insensitive), at the peak throughput, the overall average response times for LRU Top, LRU Bottom, and, SARC are, respectively, $33.35$ms, $8.92$ms, and $5.18$ms (resp. $8.62$ms, $15.26$ms, and $6.87$ms).

Table II: A comparison of average read/write response times for LRU Top, LRU Bottom, and SARC. The left (resp. right) table corresponds to cache-insensitive (resp. cache-sensitive) configuration. All the response time numbers are in ms. The best numbers for each load point are in bold.

Scaled	LRU-Top	LRU-Bottom	SARC		Scaled	LRU-Top	LRU-Bottom	SARC
IOPS	read/write	read/write	read/write		IOPS	read/write	read/write	read/write
1136	5.30/0.18	5.15/0.18	5.21/0.18		2500	2.51/0.19	1.53/0.19	1.54/0.19
5682	6.71/0.26	6.77/0.27	6.45/0.26		12500	3.00/0.41	1.79/0.38	1.76/0.35
9091	8.62/0.92	9.74/1.64	8.58/0.95		20000	5.22/1.96	3.20/1.58	2.38/0.89
10227	11.13/2.45	13.98/4.39	8.86/1.37		22500	12.71/7.18	4.95/2.92	3.34/1.60
10795	13.23/3.81	14.79/5.07	10.15/2.15		23750	24.84/16.00	7.32/4.69	4.06/2.17
11364	14.36/4.79	22.72/10.28	12.05/3.42		25000	41.70/27.78	11.10/7.46	6.77/4.12

To facilitate a more detailed analysis of the performance improvements due to SARC, Table II provides the break-up of overall average response time into read and write components. At the peak throughput in the cache-sensitive configuration, SARC provides $83.7$% and $39.0$% read response time reduction over LRU Top and LRU Bottom, respectively. Even for the cache-insensitive configuration at the peak throughput, SARC provides $16.1$% and $46.9$% read response time reduction over LRU Top and LRU Bottom, respectively.

SARC improves read response times directly by reducing the misses, serendipitously, the resultant reduction in the back-end load also improves the performance for the concurrent writes. At the peak throughput in the cache-sensitive configuration, SARC provides $85.2$% and $44.8$% write response time reduction over LRU Top and LRU Bottom, respectively. Once again, even for the cache-insensitive configuration at peak throughput, SARC provides $28.6$% and $66.7$% write response time reduction over LRU Top and LRU Bottom, respectively. Also observe in Table II that although none of the LRU strategies works well in both cache-sensitive and cache-insensitive configurations, SARC outperforms the better of the two LRU variants fairly consistently across all load levels for both reads and writes.