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RT-IPC: An IPC Extension for Real-Time Mach

Takuro Kitayama, Hideyuki Tokuda, School of Computer Science, Carnegie Mellon University; Tatsuo Nakajima, Japan Advanced Institute of Science and Technology

This paper describes the Real-Time IPC (RT-IPC) facilities, its implementation, and the evaluation results. We used the Distributed Hartstone (DHS) real-time benchmark for the evaluation and the results show that RT-IPC can reduce priority inversion and improve CPU utilization for real-time applications.

Takuro Kitayama, School of Computer Science, Carnegie Mellon University

Hideyuki Tokuda, School of Computer Science, Carnegie Mellon University

Tatsuo Nakajima, Japan Advanced Institute of Science and Technology

BibTeX
@inproceedings {252253,
author = {Takuro Kitayama and Hideyuki Tokuda and Tatsuo Nakajima},
title = {{RT-IPC}: An {IPC} Extension for {Real-Time} Mach},
booktitle = {USENIX Microkernels and Other Architectures Symposium (USENIX Microkernels and Other Architectures Symposium)},
year = {1993},
address = {San Diego, CA},
url = {https://www.usenix.org/conference/usenix-microkernels-and-other-architectures-symposium/rt-ipc-ipc-extension-real-time-mach},
publisher = {USENIX Association},
month = sep
}
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Links

Paper: 
http://usenix.org/publications/library/proceedings/micro93/full_papers/kitayama.txt
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