FarReach: Write-back Caching in Programmable Switches


Siyuan Sheng and Huancheng Puyang, The Chinese University of Hong Kong; Qun Huang, Peking University; Lu Tang, Xiamen University; Patrick P. C. Lee, The Chinese University of Hong Kong


Skewed write-intensive key-value storage workloads are increasingly observed in modern data centers, yet they also incur server overloads due to load imbalance. Programmable switches provide viable solutions for realizing load-balanced caching on the I/O path, and hence implementing write-back caching in programmable switches is a natural direction to absorb frequent writes for high write performance. However, enabling in-switch write-back caching is non-trivial, as it not only is challenged by the strict programming rules and limited stateful memory of programmable switches, but also necessitates reliable protection against data loss due to switch failures. We propose FarReach, a new caching framework that supports fast, available, and reliable in-switch write-back caching. FarReach carefully co-designs both the control and data planes for cache management in programmable switches, so as to achieve high data-plane performance with lightweight control-plane management. Experiments on a Tofino switch testbed show that FarReach achieves a throughput gain of up to 6.6× over a state-of-the-art in-switch caching approach under skewed write-intensive workloads.

USENIX ATC '23 Open Access Sponsored by
King Abdullah University of Science and Technology (KAUST)

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@inproceedings {288778,
author = {Siyuan Sheng and Huancheng Puyang and Qun Huang and Lu Tang and Patrick P. C. Lee},
title = {{FarReach}: Write-back Caching in Programmable Switches},
booktitle = {2023 USENIX Annual Technical Conference (USENIX ATC 23)},
year = {2023},
isbn = {978-1-939133-35-9},
address = {Boston, MA},
pages = {571--584},
url = {https://www.usenix.org/conference/atc23/presentation/sheng},
publisher = {USENIX Association},
month = jul

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