Check out the new USENIX Web site. next up previous
Next: Related Work Up: Other Architectures Previous: Page Protection


Intel's IA64 architecture supports variably sized register windows (the Register Stack Engine in the Intel vernacular) [7,8,9,10]. In IA64, function's can request an arbitrary number of registers unlike the 24 register window on Sparc. If an overflow or an underflow occurs, the processor stalls while the hardware interacts with the backing store. The actual loading or storing of the registers is done by the hardware instead of by kernel trap handlers.

To simulate the Sparc register window trap behavior, it may be possible to misalign the backing store pointer. Every time the Register State Engine stores to the backing store or retreives registers from it, there will be a trap into the kernel thus invoking the StackGhost mechanism.