Strong and Efficient Cache Side-Channel Protection using Hardware Transactional Memory

TitleStrong and Efficient Cache {Side-Channel} Protection using Hardware Transactional Memory
Publication TypeConference Paper
Year of Publication2017
AuthorsGruss D, Lettner J, Schuster F, Ohrimenko O, Haller I, Costa M
Conference Name26th USENIX Security Symposium (USENIX Security 17)
Date Published08/2017
PublisherUSENIX Association
Conference LocationVancouver, BC
ISBN Number978-1-931971-40-9
URLhttps://www.usenix.org/conference/usenixsecurity17/technical-sessions/presentation/gruss