From the perspective of a CPU architect, the Windows NT operating system stresses a processor's resources in different ways than application benchmarks do. To characterize how NT exercises a processor's branch prediction structures, caches, TLBs, and multi-processing features, we use performance monitor driven analysis tools (e.g. VTune) as well as trace-based simulation and performance analysis tools running on Windows NT.

Recently, new code generation strategies, analysis tools and methods have been developed in academia and industry. These include binary instrumentation (ATOM), back-mapping of performance monitor data to code modules (VTune), profile-based code layout strategies (Etch, EEL, Morph), profile-guided compilation, and on-the-fly code generators (Java virtual machines, FX!32).

I am particularly interested in how these new techniques can be extended and combined with existing methods to:

(a) Better understand the behavior of the NT operating system.
(b) Improve the performance of the NT operating system.
(c) Make better use of processor capabilities.
(d) Improve future processor designs.

Rumi Zahir, CPU Architect, Intel Corporation
rzahir@mipos2.intel.com
RN6-16, 2200 Mission College Blvd., Santa Clara, CA95052-8119